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Clock Enable: CKE HIGH activates, and CKE Low deactivates, internal clock signals and

device input buffers and output drivers. Taking CKE Low provides Precharge Power-Down and

Self-Refresh operation (all banks idle), or Active Power-Down (row Active in any bank). CKE is

asynchronous for Self-Refresh exit. After VREFCA and VREFDQ have become stable during

the power on and initialization sequence, they must be maintained during all operations

(including Self-Refresh). CKE must be maintained high throughout read and write accesses.

Input buffers, excluding CK, CK#, ODT and CKE, are disabled during power-down. Input

buffers, excluding CKE, are disabled during Self-Refresh.